Home
last modified time | relevance | path

Searched refs:MSCM_CPXCFG3_TZ_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h13516 #define MSCM_CPXCFG3_TZ_MASK (0x10U) macro
13522 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPXCFG3_TZ_SHIFT)) & MSCM_CPXCFG3_TZ_MASK)
DRV32M1_zero_riscy.h13695 #define MSCM_CPXCFG3_TZ_MASK (0x10U) macro
13701 … (((uint32_t)(((uint32_t)(x)) << MSCM_CPXCFG3_TZ_SHIFT)) & MSCM_CPXCFG3_TZ_MASK)