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Searched refs:MSCM_CFG2_TMUSZ_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h13619 #define MSCM_CFG2_TMUSZ_MASK (0xFF00U) macro
13621 … (((uint32_t)(((uint32_t)(x)) << MSCM_CFG2_TMUSZ_SHIFT)) & MSCM_CFG2_TMUSZ_MASK)
DRV32M1_zero_riscy.h13798 #define MSCM_CFG2_TMUSZ_MASK (0xFF00U) macro
13800 … (((uint32_t)(((uint32_t)(x)) << MSCM_CFG2_TMUSZ_SHIFT)) & MSCM_CFG2_TMUSZ_MASK)