Home
last modified time | relevance | path

Searched refs:MMDVSQ_CSR_DFS_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_mmdvsq.h137 base->CSR |= MMDVSQ_CSR_DFS_MASK; in MMDVSQ_SetFastStartConfig()
141 base->CSR &= ~MMDVSQ_CSR_DFS_MASK; in MMDVSQ_SetFastStartConfig()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_zero_riscy.h13488 #define MMDVSQ_CSR_DFS_MASK (0x20U) macro
13494 … (((uint32_t)(((uint32_t)(x)) << MMDVSQ_CSR_DFS_SHIFT)) & MMDVSQ_CSR_DFS_MASK)