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Searched refs:MCM_ISCR_FUFC_MASK (Results 1 – 1 of 1) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h13213 #define MCM_ISCR_FUFC_MASK (0x800U) macro
13219 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FUFC_SHIFT)) & MCM_ISCR_FUFC_MASK)