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Searched refs:MCFGR3 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_lpi2c.c400 base->MCFGR3 = (base->MCFGR3 & ~LPI2C_MCFGR3_PINLOW_MASK) | LPI2C_MCFGR3_PINLOW(cycles); in LPI2C_MasterInit()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h10225 …__IO uint32_t MCFGR3; /**< Master Configuration Register 3, offset: 0x2… member
DRV32M1_zero_riscy.h10369 …__IO uint32_t MCFGR3; /**< Master Configuration Register 3, offset: 0x2… member