Home
last modified time | relevance | path

Searched refs:LPTMR_CSR_TPP_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h12157 #define LPTMR_CSR_TPP_MASK (0x8U) macro
12163 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TPP_SHIFT)) & LPTMR_CSR_TPP_MASK)
DRV32M1_zero_riscy.h12301 #define LPTMR_CSR_TPP_MASK (0x8U) macro
12307 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TPP_SHIFT)) & LPTMR_CSR_TPP_MASK)