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Searched refs:LPTMR_CSR_TMS_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h12143 #define LPTMR_CSR_TMS_MASK (0x2U) macro
12149 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TMS_SHIFT)) & LPTMR_CSR_TMS_MASK)
DRV32M1_zero_riscy.h12287 #define LPTMR_CSR_TMS_MASK (0x2U) macro
12293 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TMS_SHIFT)) & LPTMR_CSR_TMS_MASK)