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Searched refs:LPTMR_CSR_TEN_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_lptmr.h339 reg |= LPTMR_CSR_TEN_MASK; in LPTMR_StartTimer()
356 reg &= ~LPTMR_CSR_TEN_MASK; in LPTMR_StopTimer()
Dfsl_lptmr.c97 base->CSR &= ~LPTMR_CSR_TEN_MASK; in LPTMR_Deinit()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h12136 #define LPTMR_CSR_TEN_MASK (0x1U) macro
12142 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TEN_SHIFT)) & LPTMR_CSR_TEN_MASK)
DRV32M1_zero_riscy.h12280 #define LPTMR_CSR_TEN_MASK (0x1U) macro
12286 … (((uint32_t)(((uint32_t)(x)) << LPTMR_CSR_TEN_SHIFT)) & LPTMR_CSR_TEN_MASK)