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Searched refs:LPSPI0_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h12081 #define LPSPI0_BASE (0x4003F000u) macro
12083 #define LPSPI0 ((LPSPI_Type *)LPSPI0_BASE)
12097 #define LPSPI_BASE_ADDRS { LPSPI0_BASE, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BA…
DRV32M1_zero_riscy.h12225 #define LPSPI0_BASE (0x4003F000u) macro
12227 #define LPSPI0 ((LPSPI_Type *)LPSPI0_BASE)
12241 #define LPSPI_BASE_ADDRS { LPSPI0_BASE, LPSPI1_BASE, LPSPI2_BASE, LPSPI3_BA…