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Searched refs:LPIT_MIER_TIE0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h11311 #define LPIT_MIER_TIE0_MASK (0x1U) macro
11317 … (((uint32_t)(((uint32_t)(x)) << LPIT_MIER_TIE0_SHIFT)) & LPIT_MIER_TIE0_MASK)
DRV32M1_zero_riscy.h11455 #define LPIT_MIER_TIE0_MASK (0x1U) macro
11461 … (((uint32_t)(((uint32_t)(x)) << LPIT_MIER_TIE0_SHIFT)) & LPIT_MIER_TIE0_MASK)