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Searched refs:LPI2C_SAMR_ADDR0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h11090 #define LPI2C_SAMR_ADDR0_MASK (0x7FEU) macro
11092 … (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)
DRV32M1_zero_riscy.h11234 #define LPI2C_SAMR_ADDR0_MASK (0x7FEU) macro
11236 … (((uint32_t)(((uint32_t)(x)) << LPI2C_SAMR_ADDR0_SHIFT)) & LPI2C_SAMR_ADDR0_MASK)