Searched refs:LPFLLDIV (Results 1 – 4 of 4) sorted by relevance
40 #define SCG_LPFLLDIV_LPFLLDIV1_VAL ((SCG->LPFLLDIV & SCG_LPFLLDIV_LPFLLDIV1_MASK) >> SCG_LPFLLDIV_L…41 #define SCG_LPFLLDIV_LPFLLDIV2_VAL ((SCG->LPFLLDIV & SCG_LPFLLDIV_LPFLLDIV2_MASK) >> SCG_LPFLLDIV_L…42 #define SCG_LPFLLDIV_LPFLLDIV3_VAL ((SCG->LPFLLDIV & SCG_LPFLLDIV_LPFLLDIV3_MASK) >> SCG_LPFLLDIV_L…683 SCG->LPFLLDIV = SCG_LPFLLDIV_LPFLLDIV1(config->div1) | SCG_LPFLLDIV_LPFLLDIV2(config->div2) | in CLOCK_InitLpFll()
1508 uint32_t reg = SCG->LPFLLDIV; in CLOCK_SetLpFllAsyncClkDiv()1520 SCG->LPFLLDIV = reg; in CLOCK_SetLpFllAsyncClkDiv()
16204 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
17032 …__IO uint32_t LPFLLDIV; /**< Low Power FLL Divide Register, offset: 0x504… member
