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Searched refs:LLWU_PF_WUF5_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h8787 #define LLWU_PF_WUF5_MASK (0x20U) macro
8793 … (((uint32_t)(((uint32_t)(x)) << LLWU_PF_WUF5_SHIFT)) & LLWU_PF_WUF5_MASK)
DRV32M1_zero_riscy.h8931 #define LLWU_PF_WUF5_MASK (0x20U) macro
8937 … (((uint32_t)(((uint32_t)(x)) << LLWU_PF_WUF5_SHIFT)) & LLWU_PF_WUF5_MASK)