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Searched refs:LLWU_PE2_WUPE18_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h8495 #define LLWU_PE2_WUPE18_MASK (0x30U) macro
8503 … (((uint32_t)(((uint32_t)(x)) << LLWU_PE2_WUPE18_SHIFT)) & LLWU_PE2_WUPE18_MASK)
DRV32M1_zero_riscy.h8639 #define LLWU_PE2_WUPE18_MASK (0x30U) macro
8647 … (((uint32_t)(((uint32_t)(x)) << LLWU_PE2_WUPE18_SHIFT)) & LLWU_PE2_WUPE18_MASK)