Home
last modified time | relevance | path

Searched refs:LLWU_PE1_WUPE5_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h8374 #define LLWU_PE1_WUPE5_MASK (0xC00U) macro
8382 … (((uint32_t)(((uint32_t)(x)) << LLWU_PE1_WUPE5_SHIFT)) & LLWU_PE1_WUPE5_MASK)
DRV32M1_zero_riscy.h8518 #define LLWU_PE1_WUPE5_MASK (0xC00U) macro
8526 … (((uint32_t)(((uint32_t)(x)) << LLWU_PE1_WUPE5_SHIFT)) & LLWU_PE1_WUPE5_MASK)