Home
last modified time | relevance | path

Searched refs:LLWU_FMC_FILTM1_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h9576 #define LLWU_FMC_FILTM1_MASK (0x1U) macro
9582 … (((uint32_t)(((uint32_t)(x)) << LLWU_FMC_FILTM1_SHIFT)) & LLWU_FMC_FILTM1_MASK)
DRV32M1_zero_riscy.h9720 #define LLWU_FMC_FILTM1_MASK (0x1U) macro
9726 … (((uint32_t)(((uint32_t)(x)) << LLWU_FMC_FILTM1_SHIFT)) & LLWU_FMC_FILTM1_MASK)