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Searched refs:INTMUX_CHn_IPR_31_0_INTP_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h8223 #define INTMUX_CHn_IPR_31_0_INTP_SHIFT (0U) macro
8224 …PR_31_0_INTP(x) (((uint32_t)(((uint32_t)(x)) << INTMUX_CHn_IPR_31_0_INTP_SHIFT)) & IN…
DRV32M1_zero_riscy.h8367 #define INTMUX_CHn_IPR_31_0_INTP_SHIFT (0U) macro
8368 …PR_31_0_INTP(x) (((uint32_t)(((uint32_t)(x)) << INTMUX_CHn_IPR_31_0_INTP_SHIFT)) & IN…