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Searched refs:I2S_TCR2_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h7583 #define I2S_TCR2_DIV_MASK (0xFFU) macro
7585 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)
DRV32M1_zero_riscy.h7727 #define I2S_TCR2_DIV_MASK (0xFFU) macro
7729 … (((uint32_t)(((uint32_t)(x)) << I2S_TCR2_DIV_SHIFT)) & I2S_TCR2_DIV_MASK)