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Searched refs:GPCLR (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_port.h273 base->GPCLR = ((mask & 0xffffU) << 16) | pcrl; in PORT_SetMultiplePinsConfig()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14582 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member
DRV32M1_zero_riscy.h15264 …__O uint32_t GPCLR; /**< Global Pin Control Low Register, offset: 0x8… member