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Searched refs:GPCHR (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_port.h277 base->GPCHR = (mask & 0xffff0000U) | pcrl; in PORT_SetMultiplePinsConfig()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h14583 …__O uint32_t GPCHR; /**< Global Pin Control High Register, offset: 0x… member
DRV32M1_zero_riscy.h15265 …__O uint32_t GPCHR; /**< Global Pin Control High Register, offset: 0x… member