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Searched refs:GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h24125 #define GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_MASK (0x40U) macro
24131 …t)(((uint32_t)(x)) << GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_SHIFT)) & GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_MASK)
DRV32M1_zero_riscy.h6722 #define GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_MASK (0x40U) macro
6728 …t)(((uint32_t)(x)) << GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_SHIFT)) & GENFSK_IRQ_CTRL_PLL_UNLOCK_IRQ_MASK)