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Searched refs:GENFSK_H0_CFG_H0_MASK_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h24600 #define GENFSK_H0_CFG_H0_MASK_SHIFT (16U) macro
24601 …CFG_H0_MASK(x) (((uint32_t)(((uint32_t)(x)) << GENFSK_H0_CFG_H0_MASK_SHIFT)) & GEN…
DRV32M1_zero_riscy.h7197 #define GENFSK_H0_CFG_H0_MASK_SHIFT (16U) macro
7198 …CFG_H0_MASK(x) (((uint32_t)(((uint32_t)(x)) << GENFSK_H0_CFG_H0_MASK_SHIFT)) & GEN…