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Searched refs:GENFSK_CRC_CFG_CRC_START_BYTE_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h24619 #define GENFSK_CRC_CFG_CRC_START_BYTE_MASK (0xF00U) macro
24621 …2_t)(((uint32_t)(x)) << GENFSK_CRC_CFG_CRC_START_BYTE_SHIFT)) & GENFSK_CRC_CFG_CRC_START_BYTE_MASK)
DRV32M1_zero_riscy.h7216 #define GENFSK_CRC_CFG_CRC_START_BYTE_MASK (0xF00U) macro
7218 …2_t)(((uint32_t)(x)) << GENFSK_CRC_CFG_CRC_START_BYTE_SHIFT)) & GENFSK_CRC_CFG_CRC_START_BYTE_MASK)