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Searched refs:FSL_FEATURE_MU_HAS_CCR (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_mu.h490 #if (defined(FSL_FEATURE_MU_HAS_CCR) && FSL_FEATURE_MU_HAS_CCR) in MU_HoldCoreBReset()
550 #if (defined(FSL_FEATURE_MU_HAS_CCR) && FSL_FEATURE_MU_HAS_CCR)
626 #if (defined(FSL_FEATURE_MU_HAS_CCR) && FSL_FEATURE_MU_HAS_CCR) in MU_SetClockOnOtherCoreEnable()
Dfsl_mu.c115 #if (defined(FSL_FEATURE_MU_HAS_CCR) && FSL_FEATURE_MU_HAS_CCR) in MU_BootCoreB()
146 #if (defined(FSL_FEATURE_MU_HAS_CCR) && FSL_FEATURE_MU_HAS_CCR)
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_zero_riscy_features.h848 #define FSL_FEATURE_MU_HAS_CCR (1) macro
DRV32M1_ri5cy_features.h842 #define FSL_FEATURE_MU_HAS_CCR (1) macro