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Searched refs:FLEXIO_TIMCTL_TRGSRC_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h6467 #define FLEXIO_TIMCTL_TRGSRC_MASK (0x400000U) macro
6473 … (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)
DRV32M1_zero_riscy.h5829 #define FLEXIO_TIMCTL_TRGSRC_MASK (0x400000U) macro
5835 … (((uint32_t)(((uint32_t)(x)) << FLEXIO_TIMCTL_TRGSRC_SHIFT)) & FLEXIO_TIMCTL_TRGSRC_MASK)