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Searched refs:FLEXIO_CTRL_DBGE_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_flexio.c72 …ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CT… in FLEXIO_Init()
Dfsl_flexio_spi.c164 …ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CT… in FLEXIO_SPI_MasterInit()
310 …ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CT… in FLEXIO_SPI_SlaveInit()
Dfsl_flexio_uart.c119 …ctrlReg &= ~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CT… in FLEXIO_UART_Init()
Dfsl_flexio_i2c_master.c449 …~(FLEXIO_CTRL_DOZEN_MASK | FLEXIO_CTRL_DBGE_MASK | FLEXIO_CTRL_FASTACC_MASK | FLEXIO_CTRL_FLEXEN_M… in FLEXIO_I2C_MasterInit()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h6234 #define FLEXIO_CTRL_DBGE_MASK (0x40000000U) macro
6240 … (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)
DRV32M1_zero_riscy.h5596 #define FLEXIO_CTRL_DBGE_MASK (0x40000000U) macro
5602 … (((uint32_t)(((uint32_t)(x)) << FLEXIO_CTRL_DBGE_SHIFT)) & FLEXIO_CTRL_DBGE_MASK)