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Searched refs:FB_CSCR_WS_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h6000 #define FB_CSCR_WS_MASK (0xFC00U) macro
6002 …x) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_WS_SHIFT)) & FB_CSCR_WS_MASK)
DRV32M1_zero_riscy.h5271 #define FB_CSCR_WS_MASK (0xFC00U) macro
5273 …x) (((uint32_t)(((uint32_t)(x)) << FB_CSCR_WS_SHIFT)) & FB_CSCR_WS_MASK)