Home
last modified time | relevance | path

Searched refs:FB_CSCR_ASET_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h6021 #define FB_CSCR_ASET_MASK (0x300000U) macro
6029 … (((uint32_t)(((uint32_t)(x)) << FB_CSCR_ASET_SHIFT)) & FB_CSCR_ASET_MASK)
DRV32M1_zero_riscy.h5292 #define FB_CSCR_ASET_MASK (0x300000U) macro
5300 … (((uint32_t)(((uint32_t)(x)) << FB_CSCR_ASET_SHIFT)) & FB_CSCR_ASET_MASK)