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Searched refs:EVENT_INTACTPRI_IAPRI25_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h5619 #define EVENT_INTACTPRI_IAPRI25_MASK (0x70U) macro
5621 … (((uint32_t)(((uint32_t)(x)) << EVENT_INTACTPRI_IAPRI25_SHIFT)) & EVENT_INTACTPRI_IAPRI25_MASK)
DRV32M1_zero_riscy.h4890 #define EVENT_INTACTPRI_IAPRI25_MASK (0x70U) macro
4892 … (((uint32_t)(((uint32_t)(x)) << EVENT_INTACTPRI_IAPRI25_SHIFT)) & EVENT_INTACTPRI_IAPRI25_MASK)