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Searched refs:EVENT_INTACTPRI_IAPRI0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h5598 #define EVENT_INTACTPRI_IAPRI0_MASK (0x7U) macro
5600 … (((uint32_t)(((uint32_t)(x)) << EVENT_INTACTPRI_IAPRI0_SHIFT)) & EVENT_INTACTPRI_IAPRI0_MASK)
DRV32M1_zero_riscy.h4869 #define EVENT_INTACTPRI_IAPRI0_MASK (0x7U) macro
4871 … (((uint32_t)(((uint32_t)(x)) << EVENT_INTACTPRI_IAPRI0_SHIFT)) & EVENT_INTACTPRI_IAPRI0_MASK)