Home
last modified time | relevance | path

Searched refs:EMVSIM_RX_THD_RNCK_THD_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h5031 #define EMVSIM_RX_THD_RNCK_THD_MASK (0xF00U) macro
5036 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_RX_THD_RNCK_THD_SHIFT)) & EMVSIM_RX_THD_RNCK_THD_MASK)
DRV32M1_zero_riscy.h4302 #define EMVSIM_RX_THD_RNCK_THD_MASK (0xF00U) macro
4307 … (((uint32_t)(((uint32_t)(x)) << EMVSIM_RX_THD_RNCK_THD_SHIFT)) & EMVSIM_RX_THD_RNCK_THD_MASK)