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Searched refs:EMVSIM_INT_MASK_TFF_IM_SHIFT (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4955 #define EMVSIM_INT_MASK_TFF_IM_SHIFT (6U) macro
4960 …MASK_TFF_IM(x) (((uint32_t)(((uint32_t)(x)) << EMVSIM_INT_MASK_TFF_IM_SHIFT)) & EMV…
DRV32M1_zero_riscy.h4226 #define EMVSIM_INT_MASK_TFF_IM_SHIFT (6U) macro
4231 …MASK_TFF_IM(x) (((uint32_t)(((uint32_t)(x)) << EMVSIM_INT_MASK_TFF_IM_SHIFT)) & EMV…