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Searched refs:EMVSIM_DIVISOR_DIVISOR_VALUE_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4736 #define EMVSIM_DIVISOR_DIVISOR_VALUE_MASK (0x1FFU) macro
4742 …t32_t)(((uint32_t)(x)) << EMVSIM_DIVISOR_DIVISOR_VALUE_SHIFT)) & EMVSIM_DIVISOR_DIVISOR_VALUE_MASK)
DRV32M1_zero_riscy.h4007 #define EMVSIM_DIVISOR_DIVISOR_VALUE_MASK (0x1FFU) macro
4013 …t32_t)(((uint32_t)(x)) << EMVSIM_DIVISOR_DIVISOR_VALUE_SHIFT)) & EMVSIM_DIVISOR_DIVISOR_VALUE_MASK)