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Searched refs:EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4714 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro
4722 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)
DRV32M1_zero_riscy.h3985 #define EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK (0x300U) macro
3993 …t32_t)(((uint32_t)(x)) << EMVSIM_CLKCFG_GPCNT1_CLK_SEL_SHIFT)) & EMVSIM_CLKCFG_GPCNT1_CLK_SEL_MASK)