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Searched refs:EMVSIM0 (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h5368 #define EMVSIM0 ((EMVSIM_Type *)EMVSIM0_BASE) macro
5372 #define EMVSIM_BASE_PTRS { EMVSIM0 }
DRV32M1_zero_riscy.h4639 #define EMVSIM0 ((EMVSIM_Type *)EMVSIM0_BASE) macro
4643 #define EMVSIM_BASE_PTRS { EMVSIM0 }