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Searched refs:DMA_CSR_DONE_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_edma.c393 if (DMA_CSR_DONE_MASK & base->TCD[channel].CSR) in EDMA_GetRemainingMajorLoopCount()
422 retval |= ((base->TCD[channel].CSR & DMA_CSR_DONE_MASK) >> DMA_CSR_DONE_SHIFT); in EDMA_GetChannelStatusFlags()
627 if ((tcdRegs->CSR != 0) && ((tcdRegs->CSR & DMA_CSR_DONE_MASK) == 0)) in EDMA_SubmitTransfer()
772 if ((!(tcdRegs->CSR & DMA_CSR_DONE_MASK)) || (tcdRegs->CSR & DMA_CSR_ESG_MASK)) in EDMA_StartTransfer()
834 transfer_done = ((handle->base->TCD[handle->channel].CSR & DMA_CSR_DONE_MASK) != 0); in EDMA_HandleIRQ()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4492 #define DMA_CSR_DONE_MASK (0x80U) macro
4494 … (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)
DRV32M1_zero_riscy.h3763 #define DMA_CSR_DONE_MASK (0x80U) macro
3765 … (((uint16_t)(((uint16_t)(x)) << DMA_CSR_DONE_SHIFT)) & DMA_CSR_DONE_MASK)