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Searched refs:DMAMUX_CHCFG_ENBL_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_dmamux.h80 base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_EnableChannel()
96 base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_DisableChannel()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4615 #define DMAMUX_CHCFG_ENBL_MASK (0x80000000U) macro
4621 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)
DRV32M1_zero_riscy.h3886 #define DMAMUX_CHCFG_ENBL_MASK (0x80000000U) macro
3892 … (((uint32_t)(((uint32_t)(x)) << DMAMUX_CHCFG_ENBL_SHIFT)) & DMAMUX_CHCFG_ENBL_MASK)