Home
last modified time | relevance | path

Searched refs:DCDCC6 (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_spm.h808 …base->DCDCC6 = (base->DCDCC6 & ~SPM_DCDCC6_DCDC_HSVDD_TRIM_MASK) | SPM_DCDCC6_DCDC_HSVDD_TRIM(valu… in SPM_SetDcdcVdd1p2ValueHsrun()
821 base->DCDCC6 = in SPM_SetDcdcVdd1p2ValueBuck()
822 …(base->DCDCC6 & ~SPM_DCDCC6_DCDC_VDD1P2CTRL_TRG_BUCK_MASK) | SPM_DCDCC6_DCDC_VDD1P2CTRL_TRG_BUCK(v… in SPM_SetDcdcVdd1p2ValueBuck()
835 …base->DCDCC6 = (base->DCDCC6 & ~SPM_DCDCC6_DCDC_VDD1P8CTRL_TRG_MASK) | SPM_DCDCC6_DCDC_VDD1P8CTRL_… in SPM_SetDcdcVdd1p8Value()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h18658 __IO uint32_t DCDCC6; /**< DCDC Control Register 6, offset: 0x320 */ member
DRV32M1_zero_riscy.h19486 __IO uint32_t DCDCC6; /**< DCDC Control Register 6, offset: 0x320 */ member