Searched refs:CONTROL (Results 1 – 4 of 4) sorted by relevance
41 #define RF_OSCILLATOR_READY ((RSIM->CONTROL & RSIM_CONTROL_RF_OSC_READY_MASK) != 0x0U)364 RSIM->CONTROL |= RSIM_CONTROL_RF_OSC_EN_MASK; in rf_osc_startup()376 RSIM->CONTROL &= ~RSIM_CONTROL_RF_OSC_EN_MASK; in rf_osc_shutdown()420 RSIM->CONTROL |= RSIM_CONTROL_RSIM_CGC_XCVR_EN_MASK; in XCVR_Init()606 …RSIM->CONTROL |= mode_config->scgc5_clock_ena_bits; /* Same bit storage is used but RSIM bit assig… in XCVR_Configure()1408 RSIM->CONTROL |= RSIM_CONTROL_RADIO_RESET_BIT_MASK; /* Assert radio software reset */ in XCVR_Reset()1411 RSIM->CONTROL &= ~RSIM_CONTROL_RADIO_RESET_BIT_MASK; /* De-assert radio software reset */ in XCVR_Reset()1414 …RSIM->CONTROL &= ~RSIM_CONTROL_RADIO_RESET_BIT_MASK; /* De-assert radio software reset a second ti… in XCVR_Reset()
259 USB0->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; in CLOCK_EnableUsbfs0Clock()
14822 __IO uint32_t CONTROL; /**< Radio System Control, offset: 0x0 */ member20669 __IO uint8_t CONTROL; /**< USB OTG Control register, offset: 0x108 */ member
15650 __IO uint32_t CONTROL; /**< Radio System Control, offset: 0x0 */ member21497 __IO uint8_t CONTROL; /**< USB OTG Control register, offset: 0x108 */ member
