Home
last modified time | relevance | path

Searched refs:CLOCK_EnableClock (Results 1 – 25 of 31) sorted by relevance

12

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_lptmr.c77 CLOCK_EnableClock(s_lptmrClocks[instance]); in LPTMR_Init()
79 CLOCK_EnableClock(s_lptmrPeriphClocks[instance]); in LPTMR_Init()
Dfsl_lpit.c71 CLOCK_EnableClock(s_lpitClock[instance]); in LPIT_Init()
73 CLOCK_EnableClock(s_lpitPeriphClocks[instance]); in LPIT_Init()
Dfsl_xrdc.c78 CLOCK_EnableClock(kCLOCK_Xrdc0); in XRDC_Init()
84 CLOCK_EnableClock(s_xrdcClock[i]); in XRDC_Init()
98 CLOCK_EnableClock(kCLOCK_Xrdc0); in XRDC_Deinit()
Dfsl_dmamux.c62 CLOCK_EnableClock(s_dmamuxClockName[DMAMUX_GetInstance(base)]); in DMAMUX_Init()
Dfsl_dac.c58 CLOCK_EnableClock(s_dacClocks[DAC_GetInstance(base)]); in DAC_Init()
Dfsl_ewm.c24 CLOCK_EnableClock(kCLOCK_Ewm0); in EWM_Init()
Dfsl_sema42.c67 CLOCK_EnableClock(s_sema42Clocks[SEMA42_GetInstance(base)]); in SEMA42_Init()
Dfsl_lpi2c.c338 CLOCK_EnableClock(kLpi2cClocks[instance]); in LPI2C_MasterInit()
341 CLOCK_EnableClock(kLpi2cPeriphClocks[instance]); in LPI2C_MasterInit()
1107 CLOCK_EnableClock(kLpi2cClocks[instance]); in LPI2C_SlaveInit()
1110 CLOCK_EnableClock(kLpi2cPeriphClocks[instance]); in LPI2C_SlaveInit()
Dfsl_lpspi.c177 CLOCK_EnableClock(s_lpspiClocks[instance]); in LPSPI_MasterInit()
180 CLOCK_EnableClock(s_LpspiPeriphClocks[instance]); in LPSPI_MasterInit()
248 CLOCK_EnableClock(s_lpspiClocks[instance]); in LPSPI_SlaveInit()
251 CLOCK_EnableClock(s_LpspiPeriphClocks[instance]); in LPSPI_SlaveInit()
Dfsl_intmux.c107 CLOCK_EnableClock(s_intmuxClockName[instance]); in INTMUX_Init()
Dfsl_lpcmp.c64 CLOCK_EnableClock(s_lpcmpClocks[LPCMP_GetInstance(base)]); in LPCMP_Init()
Dfsl_gpio.c150 CLOCK_EnableClock(s_fgpioClockName[FGPIO_GetInstance(base)]); in FGPIO_Init()
Dfsl_mu.c45 CLOCK_EnableClock(s_muClocks[MU_GetInstance(base)]); in MU_Init()
Dfsl_crc.c177 CLOCK_EnableClock(kCLOCK_Crc0); in CRC_Init()
Dfsl_flexio.c66 CLOCK_EnableClock(s_flexioClocks[FLEXIO_GetInstance(base)]); in FLEXIO_Init()
Dfsl_flexio_spi.c159 CLOCK_EnableClock(s_flexioClocks[FLEXIO_SPI_GetInstance(base)]); in FLEXIO_SPI_MasterInit()
305 CLOCK_EnableClock(kCLOCK_Flexio0); in FLEXIO_SPI_SlaveInit()
Dfsl_lpadc.c61 CLOCK_EnableClock(s_lpadcClocks[LPADC_GetInstance(base)]); in LPADC_Init()
Dfsl_lpuart.c275 CLOCK_EnableClock(s_lpuartClock[instance]); in LPUART_Init()
277 CLOCK_EnableClock(s_lpuartPeriphClocks[instance]); in LPUART_Init()
Dfsl_rtc.c194 CLOCK_EnableClock(kCLOCK_Rtc0); in RTC_Init()
Dfsl_clock.c255 CLOCK_EnableClock(kCLOCK_Usb0); in CLOCK_EnableUsbfs0Clock()
Dfsl_tpm.c67 CLOCK_EnableClock(s_tpmClocks[TPM_GetInstance(base)]); in TPM_Init()
Dfsl_flexio_uart.c111 CLOCK_EnableClock(s_flexioClocks[FLEXIO_UART_GetInstance(base)]); in FLEXIO_UART_Init()
Dfsl_clock.h777 static inline void CLOCK_EnableClock(clock_ip_name_t name) in CLOCK_EnableClock() function
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
Dsystem_RV32M1_zero_riscy.c470 CLOCK_EnableClock(kCLOCK_Lpit1);
Dsystem_RV32M1_ri5cy.c467 CLOCK_EnableClock(kCLOCK_Lpit0);

12