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Searched refs:CHCFG (Results 1 – 3 of 3) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_dmamux.h80 base->CHCFG[channel] |= DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_EnableChannel()
96 base->CHCFG[channel] &= ~DMAMUX_CHCFG_ENBL_MASK; in DMAMUX_DisableChannel()
110 …base->CHCFG[channel] = ((base->CHCFG[channel] & ~DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_SOURCE(s… in DMAMUX_SetSource()
126 base->CHCFG[channel] |= DMAMUX_CHCFG_TRIG_MASK; in DMAMUX_EnablePeriodTrigger()
141 base->CHCFG[channel] &= ~DMAMUX_CHCFG_TRIG_MASK; in DMAMUX_DisablePeriodTrigger()
161 base->CHCFG[channel] |= DMAMUX_CHCFG_A_ON_MASK; in DMAMUX_EnableAlwaysOn()
165 base->CHCFG[channel] &= ~DMAMUX_CHCFG_A_ON_MASK; in DMAMUX_EnableAlwaysOn()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h4584 …__IO uint32_t CHCFG[16]; /**< Channel 0 Configuration Register..Channel 15… member
DRV32M1_zero_riscy.h3855 …__IO uint32_t CHCFG[8]; /**< Channel 0 Configuration Register..Channel 7 … member