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Searched refs:CAU3_DBGMCMD_Rb_1_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h1973 #define CAU3_DBGMCMD_Rb_1_MASK (0x8000000U) macro
1975 … (((uint32_t)(((uint32_t)(x)) << CAU3_DBGMCMD_Rb_1_SHIFT)) & CAU3_DBGMCMD_Rb_1_MASK)
DRV32M1_zero_riscy.h1756 #define CAU3_DBGMCMD_Rb_1_MASK (0x8000000U) macro
1758 … (((uint32_t)(((uint32_t)(x)) << CAU3_DBGMCMD_Rb_1_SHIFT)) & CAU3_DBGMCMD_Rb_1_MASK)