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Searched refs:CAU3_COM_ALL_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_cau3.c2068 base->COM = CAU3_COM_ALL_MASK; /* Reset all engine to clear the error flag */ in cau3_wait()
Dfsl_cau3_ble.c2263 base->COM = CAU3_COM_ALL_MASK; /* Reset all engine to clear the error flag */ in cau3_wait()
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h2139 #define CAU3_COM_ALL_MASK (0x1U) macro
2145 … (((uint32_t)(((uint32_t)(x)) << CAU3_COM_ALL_SHIFT)) & CAU3_COM_ALL_MASK)
DRV32M1_zero_riscy.h1922 #define CAU3_COM_ALL_MASK (0x1U) macro
1928 … (((uint32_t)(((uint32_t)(x)) << CAU3_COM_ALL_SHIFT)) & CAU3_COM_ALL_MASK)