Home
last modified time | relevance | path

Searched refs:CAU3_CC_R31_LR_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h2080 #define CAU3_CC_R31_LR_MASK (0xFFFFFFFFU) macro
2082 … (((uint32_t)(((uint32_t)(x)) << CAU3_CC_R31_LR_SHIFT)) & CAU3_CC_R31_LR_MASK)
DRV32M1_zero_riscy.h1863 #define CAU3_CC_R31_LR_MASK (0xFFFFFFFFU) macro
1865 … (((uint32_t)(((uint32_t)(x)) << CAU3_CC_R31_LR_SHIFT)) & CAU3_CC_R31_LR_MASK)