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Searched refs:ADC_SWTRIG_SWT0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h952 #define ADC_SWTRIG_SWT0_MASK (0x1U) macro
958 … (((uint32_t)(((uint32_t)(x)) << ADC_SWTRIG_SWT0_SHIFT)) & ADC_SWTRIG_SWT0_MASK)
DRV32M1_zero_riscy.h923 #define ADC_SWTRIG_SWT0_MASK (0x1U) macro
929 … (((uint32_t)(((uint32_t)(x)) << ADC_SWTRIG_SWT0_SHIFT)) & ADC_SWTRIG_SWT0_MASK)