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Searched refs:ADC0_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h1179 #define ADC0_BASE (0x4004A000u) macro
1181 #define ADC0 ((ADC_Type *)ADC0_BASE)
1183 #define ADC_BASE_ADDRS { ADC0_BASE }
DRV32M1_zero_riscy.h1150 #define ADC0_BASE (0x4004A000u) macro
1152 #define ADC0 ((ADC_Type *)ADC0_BASE)
1154 #define ADC_BASE_ADDRS { ADC0_BASE }