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Searched refs:watermark (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/iuart/
Dfsl_uart.h832 static inline void UART_SetTxFifoWatermark(UART_Type *base, uint8_t watermark) in UART_SetTxFifoWatermark() argument
834 … assert((watermark >= 2U) && ((int32_t)watermark <= (int32_t)FSL_FEATURE_IUART_FIFO_SIZEn(base))); in UART_SetTxFifoWatermark()
835 base->UFCR = (base->UFCR & ~UART_UFCR_TXTL_MASK) | UART_UFCR_TXTL(watermark); in UART_SetTxFifoWatermark()
847 static inline void UART_SetRxRTSWatermark(UART_Type *base, uint8_t watermark) in UART_SetRxRTSWatermark() argument
849 assert((int32_t)watermark <= (int32_t)FSL_FEATURE_IUART_FIFO_SIZEn(base)); in UART_SetRxRTSWatermark()
850 base->UCR4 = (base->UCR4 & ~UART_UCR4_CTSTL_MASK) | UART_UCR4_CTSTL(watermark); in UART_SetRxRTSWatermark()
861 static inline void UART_SetRxFifoWatermark(UART_Type *base, uint8_t watermark) in UART_SetRxFifoWatermark() argument
863 assert((int32_t)watermark <= (int32_t)FSL_FEATURE_IUART_FIFO_SIZEn(base)); in UART_SetRxFifoWatermark()
864 base->UFCR = (base->UFCR & ~UART_UFCR_RXTL_MASK) | UART_UFCR_RXTL(watermark); in UART_SetRxFifoWatermark()
/hal_nxp-latest/mcux/mcux-sdk/drivers/spi/
Dfsl_spi.c257 if (handle->watermark > 1U) in SPI_SendInitialTransfer()
284 if (handle->watermark == 1U) in SPI_SendTransfer()
323 uint8_t bytestoTransfer = (uint8_t)handle->watermark * 2U; in SPI_SendTransfer()
347 if (handle->watermark == 1U) in SPI_ReceiveTransfer()
378 if (handle->rxRemainingBytes == ((uint32_t)handle->watermark * 2U)) in SPI_ReceiveTransfer()
1025 handle->watermark = SPI_GetWatermark(base); in SPI_MasterTransferCreateHandle()
1082 handle->watermark = SPI_GetWatermark(base); in SPI_MasterTransferNonBlocking()
1085 if (xfer->dataSize < (uint32_t)handle->watermark * 2U) in SPI_MasterTransferNonBlocking()
1087 handle->watermark = 1U; in SPI_MasterTransferNonBlocking()
1091 if (handle->watermark > 1U) in SPI_MasterTransferNonBlocking()
[all …]
Dfsl_spi.h232 uint8_t watermark; /*!< Watermark value for SPI transfer */ member
/hal_nxp-latest/imx/drivers/
Duart_imx.h444 static inline void UART_SetTxFifoWatermark(UART_Type* base, uint8_t watermark) in UART_SetTxFifoWatermark() argument
446 assert((watermark >= 2) && (watermark <= 32)); in UART_SetTxFifoWatermark()
447 UART_UFCR_REG(base) = (UART_UFCR_REG(base) & ~UART_UFCR_TXTL_MASK) | UART_UFCR_TXTL(watermark); in UART_SetTxFifoWatermark()
458 static inline void UART_SetRxFifoWatermark(UART_Type* base, uint8_t watermark) in UART_SetRxFifoWatermark() argument
460 assert(watermark <= 32); in UART_SetRxFifoWatermark()
461 UART_UFCR_REG(base) = (UART_UFCR_REG(base) & ~UART_UFCR_RXTL_MASK) | UART_UFCR_RXTL(watermark); in UART_SetRxFifoWatermark()
Dadc_imx7d.h488 static inline void ADC_SetDmaWatermark(ADC_Type* base, uint32_t watermark) in ADC_SetDmaWatermark() argument
490 assert(watermark <= 0x1FF); in ADC_SetDmaWatermark()
492 ADC_DMA_FIFO_DMA_WM_LVL(watermark); in ADC_SetDmaWatermark()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/i2s/
Dfsl_i2s.c135 trig |= I2S_FIFOTRIG_TXLVL(config->watermark); /* set TX FIFO trigger level */ in I2S_TxInit()
169 trig |= I2S_FIFOTRIG_RXLVL(config->watermark); /* set RX FIFO trigger level */ in I2S_RxInit()
253 config->watermark = 4U; in I2S_TxGetDefaultConfig()
307 config->watermark = 4U; in I2S_RxGetDefaultConfig()
562 …handle->watermark = (uint8_t)((base->FIFOTRIG & I2S_FIFOTRIG_TXLVL_MASK) >> I2S_FIFOTRIG_TXLVL_SH… in I2S_TxTransferCreateHandle()
613 …->FIFOTRIG = (base->FIFOTRIG & (~I2S_FIFOTRIG_TXLVL_MASK)) | I2S_FIFOTRIG_TXLVL(handle->watermark); in I2S_TxTransferNonBlocking()
666 …handle->watermark = (uint8_t)((base->FIFOTRIG & I2S_FIFOTRIG_RXLVL_MASK) >> I2S_FIFOTRIG_RXLVL_SH… in I2S_RxTransferCreateHandle()
718 …->FIFOTRIG = (base->FIFOTRIG & (~I2S_FIFOTRIG_RXLVL_MASK)) | I2S_FIFOTRIG_RXLVL(handle->watermark); in I2S_RxTransferNonBlocking()
Dfsl_i2s.h106 uint8_t watermark; /*!< FIFO trigger level */ member
146 uint8_t watermark; /*!< FIFO trigger level */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/sdadc/
Dfsl_sdadc.h65 #define SDADC_FIFO_WATERMARK_CTL_P(watermark, offset) \ argument
66 (((uint32_t)(((uint32_t)(watermark)) << SDADC_FIFO_WATERMARK_CTL_P_SHIFT(offset))) & \
70 #define SDADC_FIFO_WATERMARK_CTL_N(watermark, offset) \ argument
71 (((uint32_t)(((uint32_t)(watermark)) << SDADC_FIFO_WATERMARK_CTL_N_SHIFT(offset))) & \
266 sdadc_watermark_t watermark; /*!< Sets N- and P-side FIFO watermark. */ member
Dfsl_sdadc.c155 …ConfigureFifoWatermark(base, channelConfig->number, channelConfig->type, channelConfig->watermark); in SDADC_Init()
/hal_nxp-latest/mcux/mcux-sdk/drivers/dac32/
Dfsl_dac32.c153 tmp32 |= (DAC_STATCTRL_DACBFWM(config->watermark) | DAC_STATCTRL_DACBFMD(config->workMode) | in DAC32_SetBufferConfig()
178 config->watermark = kDAC32_BufferWatermark1Word; in DAC32_GetDefaultBufferConfig()
Dfsl_dac32.h105 dac32_buffer_watermark_t watermark; /*!< Select the buffer's watermark. */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/spdif/
Dfsl_spdif.c393 handle->watermark = in SPDIF_TransferTxCreateHandle()
428 handle->watermark = in SPDIF_TransferRxCreateHandle()
662 dataSize = handle->watermark; in SPDIF_TransferTxHandleIRQ()
794 dataSize = handle->watermark; in SPDIF_TransferRxHandleIRQ()
/hal_nxp-latest/mcux/mcux-sdk/drivers/dac/
Dfsl_dac.c163 tmp8 |= DAC_C1_DACBFWM(config->watermark); in DAC_SetBufferConfig()
196 config->watermark = kDAC_BufferWatermark1Word; in DAC_GetDefaultBufferConfig()
Dfsl_dac.h126 dac_buffer_watermark_t watermark; /*!< Select the buffer's watermark. */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/easrc/
Dfsl_asrc_sdma.c305 …handle->outDMAHandle.asrcOutWatermark = (asrcConfig->contextOutput.watermark + 1U) * asrcConfig->c… in ASRC_TransferSetContextConfigSDMA()
306 …handle->inDMAHandle.asrcInWatermark = (asrcConfig->contextInput.watermark + 1U) * asrcConfig->co… in ASRC_TransferSetContextConfigSDMA()
457 p2pConfig.destWatermark = handle->outDMAHandle.peripheralConfig->watermark; in ASRC_TransferOutSDMA()
537 p2pConfig.sourceWatermark = handle->inDMAHandle.peripheralConfig->watermark; in ASRC_TransferInSDMA()
Dfsl_asrc.h202 uint8_t watermark; /*!< input water mark per samples */ member
211 uint8_t watermark; /*!< output water mark per samples */ member
Dfsl_asrc.c747 contextReg |= ASRC_CTX_CTRL_FIFO_WTMK(config->watermark); in ASRC_SetContextInputConfig()
783 contextReg |= ASRC_CTX_OUT_CTRL_FIFO_WTMK(config->watermark); in ASRC_SetContextOutputConfig()
845 config->contextInput.watermark = FSL_ASRC_INPUT_FIFO_DEPTH / 2U; in ASRC_GetContextDefaultConfig()
856 config->contextOutput.watermark = FSL_ASRC_OUTPUT_FIFO_DEPTH / 8U; in ASRC_GetContextDefaultConfig()
Dfsl_asrc_sdma.h46 uint8_t watermark; /*!< peripheral watermark */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan_edma.c331 …uint32_t watermark = ((base->ERFCR & CAN_ERFCR_ERFWM_MASK) >> CAN_ERFCR_ERFWM_SHIFT) + 1… in FLEXCAN_TransferReceiveEnhancedFifoEDMA() local
346 if ((watermark != 1U) || ((sizeof(uint32_t) * perReadWords) != sizeof(flexcan_fd_frame_t))) in FLEXCAN_TransferReceiveEnhancedFifoEDMA()
Dfsl_flexcan.c3977 uint32_t watermark = ((base->ERFCR & CAN_ERFCR_ERFWM_MASK) >> CAN_ERFCR_ERFWM_SHIFT) + 1U; in FLEXCAN_TransferReceiveEnhancedFifoNonBlocking() local
3991 if (handle->rxFifoTransferTotalNum >= watermark) in FLEXCAN_TransferReceiveEnhancedFifoNonBlocking()
4665 uint32_t watermark = ((base->ERFCR & CAN_ERFCR_ERFWM_MASK) >> CAN_ERFCR_ERFWM_SHIFT) + 1U; in FLEXCAN_SubHandlerForEhancedRxFifo() local
4686 transferFrames = (handle->rxFifoFrameNum > watermark) ? watermark : handle->rxFifoFrameNum; in FLEXCAN_SubHandlerForEhancedRxFifo()
4710 else if (handle->rxFifoFrameNum < watermark) in FLEXCAN_SubHandlerForEhancedRxFifo()
/hal_nxp-latest/mcux/mcux-sdk/drivers/esai/
Dfsl_esai.c809 handle->watermark = (uint8_t)((base->TFCR & ESAI_TFCR_TFWM_MASK) >> ESAI_TFCR_TFWM_SHIFT); in ESAI_TransferTxCreateHandle()
843 handle->watermark = (uint8_t)((base->RFCR & ESAI_RFCR_RFWM_MASK) >> ESAI_RFCR_RFWM_SHIFT); in ESAI_TransferRxCreateHandle()
1140 … (size_t)(((uint32_t)FSL_FEATURE_ESAI_FIFO_SIZEn(base) - handle->watermark) * dataSize)); in ESAI_TransferTxHandleIRQ()
1190 …size_t size = MIN((handle->esaiQueue[handle->queueDriver].dataSize), (handle->watermark * (uint32_… in ESAI_TransferRxHandleIRQ()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mcan/
Dfsl_mcan.h258 uint32_t watermark; /*!< FIFOn watermark level. */ member
275 uint32_t watermark; /*!< FIFOn watermark level. */ member
Dfsl_mcan.c1284 CAN_RXF0C_F0WM(config->watermark) | CAN_RXF0C_F0OM(config->opmode); in MCAN_SetRxFifo0Config()
1302 CAN_RXF1C_F1WM(config->watermark) | CAN_RXF1C_F1OM(config->opmode); in MCAN_SetRxFifo1Config()
1335 CAN_TXEFC_EFWM(config->watermark); in MCAN_SetTxEventFifoConfig()
/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h303 uint8_t watermark; /*!< Watermark value */ member
476 uint8_t watermark; /*!< Watermark value */ member
/hal_nxp-latest/mcux/mcux-sdk/drivers/pdm/
Dfsl_pdm.c521 handle->watermark = (uint8_t)(base->FIFO_CTRL & PDM_FIFO_CTRL_FIFOWMK_MASK); in PDM_TransferCreateHandle()
651 … ((uint32_t)handle->watermark * handle->channelNums * handle->format)); in PDM_TransferHandleIRQ()

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