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Searched refs:uSDHC_MIX_CTRL_DDR_EN_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h40715 #define uSDHC_MIX_CTRL_DDR_EN_MASK 0x8u macro
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h44328 #define uSDHC_MIX_CTRL_DDR_EN_MASK 0x8u macro