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Searched refs:ss (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1802 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1812 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1825 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1838 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2612 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1802 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1812 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1825 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1838 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2612 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1770 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1780 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1793 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1806 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2579 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1802 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1812 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1825 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1838 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2612 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1802 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1812 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1825 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1838 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2612 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1802 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1812 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1825 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1838 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2612 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.c182 const clock_pll_ss_config_t *ss);
272 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
274 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
276 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
277 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
289 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
322 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
325 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
326 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1770 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1780 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1793 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1806 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
2579 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.c151 …e, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss);
236 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
238 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
240 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
241 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
253 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
254 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
286 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
289 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1311 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1321 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1334 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1969 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.c151 …e, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss);
236 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
238 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
240 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
241 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
253 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
254 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
286 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
289 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1311 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1321 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1334 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1969 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.c151 …e, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss);
236 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
238 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
240 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
241 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
253 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
254 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
286 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
289 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1311 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1321 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1334 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1969 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.c151 …e, uint8_t div, uint32_t numer, uint8_t post_div, uint32_t denom, const clock_pll_ss_config_t *ss);
236 …OCK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss) in CLOCK_CalcPllSpreadSpectrum() argument
238 assert(ss != NULL); in CLOCK_CalcPllSpreadSpectrum()
240 ss->stop = (uint16_t)(factor * range / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
241 ss->step = (uint16_t)((mod << 1UL) * (uint32_t)(ss->stop) / XTAL_FREQ); in CLOCK_CalcPllSpreadSpectrum()
253 …((ANADIG_PLL_SYS_PLL2_SS_ENABLE(config->ssEnable) | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
254 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)) == ANADIG_PLL->SYS_PLL2_SS)) in CLOCK_InitSysPll2()
286 if ((config != NULL) && (config->ssEnable) && (config->ss != NULL)) in CLOCK_InitSysPll2()
289 …YS_PLL2_SS = (ANADIG_PLL_SYS_PLL2_SS_ENABLE_MASK | ANADIG_PLL_SYS_PLL2_SS_STOP(config->ss->stop) | in CLOCK_InitSysPll2()
290 ANADIG_PLL_SYS_PLL2_SS_STEP(config->ss->step)); in CLOCK_InitSysPll2()
[all …]
Dfsl_clock.h1311 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1321 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1334 clock_pll_ss_config_t *ss; /*!< Spread spectrum parameter, member
1969 …CK_CalcPllSpreadSpectrum(uint32_t factor, uint32_t range, uint32_t mod, clock_pll_ss_config_t *ss);
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1160/
Dclock_config.c259 .ss = NULL, /* Spread spectrum parameter */
269 .ss = NULL, /* Spread spectrum parameter */
1009 .ss = NULL, /* Spread spectrum parameter */
1019 .ss = NULL, /* Spread spectrum parameter */
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1170/
Dclock_config.c263 .ss = NULL, /* Spread spectrum parameter */
273 .ss = NULL, /* Spread spectrum parameter */
1078 .ss = NULL, /* Spread spectrum parameter */
1088 .ss = NULL, /* Spread spectrum parameter */
/hal_nxp-latest/mcux/mcux-sdk/boards/evkbmimxrt1170/
Dclock_config.c263 .ss = NULL, /* Spread spectrum parameter */
273 .ss = NULL, /* Spread spectrum parameter */
1078 .ss = NULL, /* Spread spectrum parameter */
1088 .ss = NULL, /* Spread spectrum parameter */

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