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Searched refs:sc_pm_clk_t (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
182 typedef uint8_t sc_pm_clk_t; typedef
512 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
537 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
565 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
589 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
610 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c316 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
340 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
366 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
390 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
412 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
Dpm_rpc_clnt.c318 sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_set_clock_rate()
342 sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_get_clock_rate()
368 sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, in sc_pm_clock_enable()
392 sc_pm_clk_t clk, sc_pm_clk_parent_t parent) in sc_pm_set_clock_parent()
414 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent) in sc_pm_get_clock_parent()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/scfw_api/svc/pm/
Dpm_api.h77 #define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /*!< All clocks */
193 typedef uint8_t sc_pm_clk_t; typedef
522 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
547 sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
575 sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
599 sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
620 sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);

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